EE4301: Digital Design With Programmable Logic

4 Credits

Introduction to system design/simulation. Design using Verilog code/synthesis. Emulation using Verilog code. prereq: 2301, [1301 or CSCI 1113 or CSCI 1901]

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All Instructors

B Average (3.026)Most Common: A (20%)

This total also includes data from semesters with unknown instructors.

279 students
SNWFDCBA

  • 3.96

    /5

    Recommend

  • 3.71

    /5

    Effort

  • 4.27

    /5

    Understanding

  • 3.99

    /5

    Interesting

  • 4.18

    /5

    Activities

  • Samyok Nepal

    Website/Infrastructure Lead

  • Kanishk Kacholia

    Backend/Data Lead

  • Joey McIndoo

    Feature Engineering

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