EE 5324: VLSI Design II

3 CreditsOnline Available

CMOS arithmetic logic units, high-speed carry chains, fast CMOS multipliers. High-speed performance parallel shifters. CMOS memory cells, array structures, read/write circuits. Design for testability, including scan design and built-in self test. VLSI case studies. prereq: [5323, CSE grad student] or dept consent

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A- Average (3.660)Most Common: A (43%)

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100 students
SWFDCBA
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    /5

    Recommend
  • 3.91

    /5

    Effort
  • 4.58

    /5

    Understanding
  • 4.53

    /5

    Interesting
  • 4.67

    /5

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